ARM Holdings has announced that it has geared up to enter the data center fabric business with its new generation of networking technology. ARM is a UK based firm, and it said that it is planning a big expansion in the next 12 to 15 years.
ARM is a semiconductor production company located in Cambridge. ARM’s Core Link CCN-504 cache coherent network is being termed as a licensable intellectual property. This new advancement in technology is capable of delivering upto one terabyte of usable bandwidth per second.
This new technology will “enable SoC designers to provide high-performance, cache coherent interconnect for many core-enterprise solutions built using the ARM Cortex-A15 MPCore processor and next-generation 64-bit processors,” according to ARM.
LSI and Calxeda are the two licensees of this technology. Calxeda is a Texas based firm that recently raised about $50M for its first round of investment.
“Calxeda and ARM have been working closely to meet the demands of the data center since ARM’s initial investment in our company in 2008, and we are beginning to see the fruits of that relationship. We are already building our next generation data center-class solutions using this new ARM CoreLink technology, and think we will once again send shockwaves across the industry when they are announced,” Calxeda co-founder and CEO Barry Evans said in a statement.
Calxeda seems to be depending on the performance testing of its servers that are being conducted in-house. It says that the company manufactured server chips are capable of delivering ten-fold energy efficiency compared to its competitors like the x86 based servers.
ARM’s new CoreLink CCN-504 products features up to 16 cores on a single chip.
“As the amount of data used increases exponentially over the next 10-15 years, the CoreLink CCN-504 and DMC-520 will play an important role by providing high-performance system IP solutions for many-core applications. This ensures quality of service and coherent operation across the system, and enables SoC designers to efficiently prioritize and handle wide data flows with optimum latency,” said Tom Cronk, deputy general manager of ARM’s processor division.
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